Unveiling the impact of the bias-dependent charge neutrality point on graphene based multi-transistor applications

Abstract The Dirac voltage of a graphene field-effect transistor (GFET) stands for the gate bias that sets charge neutrality condition in channel, thus resulting minimum conductivity. Controlling its dependence on terminal biases is crucial design and optimization radio-frequency applications based multiple GFETs. However, previous analysis such carried out single devices uncomplete if not properly understood could result circuit designs with poor performance. control point shift (DPS) particularly important deployment graphene-based differential topologies where keeping strict symmetry between electrically balanced branches essential exploiting advantages topologies. This note sheds light impact DPS real device rigorous methodology to it so eventually optimize exploit performance